BCA Semester 1 – Digital Logic () Questions & Answers | Past TU Exam Papers

Question 1

Design MOD-7 counter with state and timing diagram.

Marks: 5

Year: 2019 Final TU FOHSS

MOD-7 Counter Definition: A MOD-7 counter is a counter that counts from 0 to 6 (7 states) and then resets to 0. Type: - Can be synchronous or asynchronous. - Requires 3 flip-flops (since 2³ = 8

Question 2

Distinguish between sequential and combinational logic with example? Discuss the design procedure of combinational logic.

Marks: 10

Year: 2019 Final TU FOHSS

1. Difference between Combinational and Sequential Logic | Feature | Combinational Logic | Sequential Logic | |---------|------------------|----------------| | Definition | Output depends only on curr

Question 3

A sequential circuit with two D flip flops, A and B, two inputs x and y, and one output z, is specified by the following next state and output equations.\( A(t + 1) = x'y + xAB(t + 1) = x/B + xAz = B.

Marks: 10

Year: 2019 Final TU FOHSS

1. Given Sequential Circuit - Flip-Flops: D-type (A and B) - Inputs: x, y - Output: z - Next State Equations: \[ A(t+1) = x'y + xAB \] \[ B(t+1) = x'B + xAz \] \[ z = B \] --- 2. Step 1: De

Question 4

Write short Notes on (any Two): a) Parallel Adder b) PLA c) State Diagram

Marks: 5

Year: 2020 Final TU FOHSS

a) Parallel Adder - A Parallel Adder is a combinational circuit that adds two binary numbers of n bits simultaneously. - Uses n full adders connected in series; each adder adds corresponding bits al

Question 5

Differentiate between asynchronous and synchronous sequential circuits with example. Draw a block diagram, truth table and timing diagram to store 2001 in 4-bit SIPO register.

Marks: 10

Year: 2020 Final TU FOHSS

1. Difference Between Asynchronous and Synchronous Sequential Circuits | Feature | Asynchronous Sequential Circuit | Synchronous Sequential Circuit | |---------|-------------------------------|-------

Question 6

Define counter. Write a procedure to design a counter circuit. Design MOD-8 up counter.

Marks: 10

Year: 2020 Final TU FOHSS

1. Definition of Counter - A counter is a sequential circuit that counts the number of clock pulses applied to it. - Counters can store and display the count in binary or decimal. - Types: Up coun

Question 7

Differentiate between synchronous and asynchronous counter. Design 3-bit up ripple counter.

Marks: 5

Year: 2021 Final TU FOHSS

1. Difference between Synchronous and Asynchronous Counters | Feature | Synchronous Counter | Asynchronous (Ripple) Counter | |---------|------------------|-----------------------------| | Clock Input

Question 8

What is counter? Design a mod 7 synchronous counter with state table, state diagram, circuit diagram.

Marks: 10

Year: 2021 Final TU FOHSS

1. Definition of Counter - A counter is a sequential circuit that counts clock pulses and produces a binary output representing the number of pulses. - Types: - Asynchronous (Ripple) Counter: Fl

Question 9

Differentiate between synchronous and ripple counter. Design mod 7 ripple counter with its state diagram, sequence table, logic diagram and timing diagram.

Marks: 5

Year: 2022 Final TU FOHSS

1. Difference Between Synchronous Counter and Ripple (Asynchronous) Counter | Feature | Synchronous Counter | Ripple (Asynchronous) Counter | |--------|----------------------|-------------------------

Question 10

What is state diagram? A sequential circuit with two D flip-flops A and B, one input x and one output z is specified by the following next state and output equations: \[ A(t + 1) = A' + B, B(t + 1) =

Marks: 10

Year: 2022 Final TU FOHSS

1. Definition: State Diagram - A state diagram is a graphical representation of a sequential circuit. - Shows all possible states of the circuit, transitions between states based on inputs, and corr

Question 11

Explain ring counter. Design a 3-bit asynchronous up counter with block diagram, count sequence table, and timing diagram.

Marks: 10

Year: 2023 Final TU FOHSS

1. Ring Counter A ring counter is a type of shift register where the output of the last flip-flop is fed back to the input of the first flip-flop. Key Features: - Only one flip-flop is high at a time;

Question 12

Explain the design procedure of a clocked sequential circuit. Design a clocked sequential circuit whose state diagram is given in the figure.

Marks: 10

Year: 2023 Final TU FOHSS

1. Understanding the Problem - Analyze the state diagram provided. - Identify the number of states and transitions. - Note input conditions and outputs for each transition. --- 2. Assign Binary Codes

Question 13

Write short notes on (any two): a) State reduction table \ b) Multiplexer\ c) Synchronous and Asynchronous counter

Marks: 5

Year: 2024 Final TU FOHSS

a) State Reduction Table Definition: A state reduction table is used to minimize the number of states in a sequential circuit without changing its input-output behavior. Key Points: - Helps in sim

Question 14

Explain shift register with parallel load. Design a synchronous Mod-10 counter to count in the sequence 0,2,4,5,6,8 using T flip-flops.

Marks: 10

Year: 2024 Final TU FOHSS

1. Shift Register with Parallel Load Definition: A shift register is a sequential circuit used to store and shift data. A shift register with parallel load can load multiple bits simultaneously in o